OpenLANE Workshop Day 2: Tapeout Pakistan

This workshop will be conducted by MERL-UIT in collaboration with Open-Source FPGA (OSFPGA) Foundation, it is based on 8 days outcome based training, the training is starting form 15th-July-2021 and scheduled 2 days per week. i.e Tuesday and Thursday.

Detailed schedule is given below:

Day1: Introduction to APR,OpenLANE and Sky130 PDK

Day2: Getting started with OpenLANE and CMOS

Day3: RTL Synthesis & STA

Day4: Floorplan + PDN

Day5: Placement

Day6: Clock Tree Synthesis (CTS)

Day7: Routing

Day8: Final Steps toward GDS

Prerequisite:

1. Join Slack Channel: https://join.slack.com/t/aprtraining/shared_invite/zt-so00q69c-qdyjgGo_fj5p9Yhi0WEL1A

2. Watch Day 1: https://youtu.be/jDPnI2JzLyU

3. Complete this Verilog training: https://www.youtube.com/watch?v=nblGw37Fv8A

3.1: Practice on this tool(Icarus Verilog): https://iverilog.fandom.com/wiki/Installation_Guide

4. Install Linux OS as a dual boot: https://youtu.be/u5QyjHIYwTQ

OR install it on Virtual Machine: https://youtu.be/x5MhydijWmc

Other Links:
Website: https://www.merledupk.org
Facebook: https://business.facebook.com/merluit
LinkedIn: https://www.linkedin.com/company/merluit
Instagram: https://www.instagram.com/merluit
Twitter: https://twitter.com/merluit
GitHub: https://github.com/merledu

source

by Micro Electronics Research Lab -UIT

linux foundation